【深入理解Linux内核锁】三、原子操作 #

/*设置原子变量的值*/
atomic_t v = ATOMIC_INIT(0);            /* 定义原子变量v并初始化为0 */
void atomic_set(atomic_t *v, int i);    /* 设置原子变量的值为i */

/*获取原子变量的值*/
atomic_read(atomic_t *v);        		/* 返回原子变量的值*/

/*原子变量的加减*/
void atomic_add(int i, atomic_t *v);      /* 原子变量增加i */
void atomic_sub(int i, atomic_t *v);      /* 原子变量减少i */

/*原子变量的自增，自减*/
void atomic_inc(atomic_t *v);				/* 原子变量增加1 */
void atomic_dec(atomic_t *v);     			/* 原子变量减少1 */

/*原子变量的操作并测试*/
int atomic_inc_and_test(atomic_t *v);		/*进行对应操作后，测试原子变量值是否为0*/
int atomic_dec_and_test(atomic_t *v);
int atomic_sub_and_test(int i, atomic_t *v);

/*原子变量的操作并返回*/
int atomic_add_return(int i, atomic_t *v);	/*进行对应操作后，返回新的值*/
int atomic_sub_return(int i, atomic_t *v);
int atomic_inc_return(atomic_t *v);
int atomic_dec_return(atomic_t *v);

typedef struct {
    int counter;
} atomic_t;

// arch/arm/include/asm/atomic.h
#define atomic_set(v,i)	WRITE_ONCE(((v)->counter), (i))

// include/linux/compiler.h
#define WRITE_ONCE(x, val) \
({							\
    union { typeof(x) __val; char __c[1]; } __u =	\
        { .__val = (__force typeof(x)) (val) }; \
    __write_once_size(&(x), __u.__c, sizeof(x));	\
    __u.__val;					\
})

static __always_inline void __write_once_size(volatile void *p, void *res, int size)
{
    switch (size) {
    case 1: *(volatile __u8 *)p = *(__u8 *)res; break;
    case 2: *(volatile __u16 *)p = *(__u16 *)res; break;
    case 4: *(volatile __u32 *)p = *(__u32 *)res; break;
    case 8: *(volatile __u64 *)p = *(__u64 *)res; break;
    default:
        barrier();
        __builtin_memcpy((void *)p, (const void *)res, size);
        barrier();
    }
}

/*
 * ARMv6 UP and SMP safe atomic ops.  We use load exclusive and
 * store exclusive to ensure that these are atomic.  We may loop
 * to ensure that the update happens.
 */

#define ATOMIC_OP(op, c_op, asm_op)					\
static inline void atomic_##op(int i, atomic_t *v)			\
{									\
    unsigned long tmp;						\
    int result;							\
                                    \
    prefetchw(&v->counter);						\
    __asm__ __volatile__("@ atomic_" #op "\n"			\
"1:	ldrex	%0, [%3]\n"						\
"	" #asm_op "	%0, %0, %4\n"					\
"	strex	%1, %0, [%3]\n"						\
"	teq	%1, #0\n"						\
"	bne	1b"							\
    : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter)		\
    : "r" (&v->counter), "Ir" (i)					\
    : "cc");							\
}									\

#define ATOMIC_OP_RETURN(op, c_op, asm_op)				\
static inline int atomic_##op##_return_relaxed(int i, atomic_t *v)	\
{									\
    unsigned long tmp;						\
    int result;							\
                                    \
    prefetchw(&v->counter);						\
                                    \
    __asm__ __volatile__("@ atomic_" #op "_return\n"		\
"1:	ldrex	%0, [%3]\n"						\
"	" #asm_op "	%0, %0, %4\n"					\
"	strex	%1, %0, [%3]\n"						\
"	teq	%1, #0\n"						\
"	bne	1b"							\
    : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter)		\
    : "r" (&v->counter), "Ir" (i)					\
    : "cc");							\
                                    \
    return result;							\
}

#define ATOMIC_FETCH_OP(op, c_op, asm_op)				\
static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v)	\
{									\
    unsigned long tmp;						\
    int result, val;						\
                                    \
    prefetchw(&v->counter);						\
                                    \
    __asm__ __volatile__("@ atomic_fetch_" #op "\n"			\
"1:	ldrex	%0, [%4]\n"						\
"	" #asm_op "	%1, %0, %5\n"					\
"	strex	%2, %1, [%4]\n"						\
"	teq	%2, #0\n"						\
"	bne	1b"							\
    : "=&r" (result), "=&r" (val), "=&r" (tmp), "+Qo" (v->counter)	\
    : "r" (&v->counter), "Ir" (i)					\
    : "cc");							\
                                    \
    return result;							\
}

#define ATOMIC_OPS(op, c_op, asm_op)					\
    ATOMIC_OP(op, c_op, asm_op)					\
    ATOMIC_OP_RETURN(op, c_op, asm_op)				\
    ATOMIC_FETCH_OP(op, c_op, asm_op)
    
ATOMIC_OPS(add, +=, add)
ATOMIC_OPS(sub, -=, sub)

#define ATOMIC_OP(op, c_op, asm_op)					\
static inline void atomic_##op(int i, atomic_t *v)			\
{									\
    unsigned long tmp;						\
    int result;							\
                                    \
    prefetchw(&v->counter);						\
    __asm__ __volatile__("@ atomic_" #op "\n"			\
"1:	ldrex	%0, [%3]\n"						\
"	" #asm_op "	%0, %0, %4\n"					\
"	strex	%1, %0, [%3]\n"						\
"	teq	%1, #0\n"						\
"	bne	1b"							\
    : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter)		\
    : "r" (&v->counter), "Ir" (i)					\
    : "cc");							\
}		

ATOMIC_OPS(add, +=, add)
ATOMIC_OPS(sub, -=, sub)

void set_bit(nr, void *addr);		//	设置位：设置addr地址的第nr位，所谓设置位即是将位写为1
void clear_bit(nr, void *addr);		//	清除位：清除addr地址的第nr位，所谓清除位即是将位写为0
void change_bit(nr, void *addr);	//	改变位：对addr地址的第nr位进行反置。
int test_bit(nr, void *addr);		//	测试位：返回addr地址的第nr位。
int test_and_set_bit(nr, void *addr);//	测试并设置位
int test_and_clear_bit(nr, void *addr);	//	测试并清除位
int test_and_change_bit(nr, void *addr);//	测试并改变位

#define set_bit(nr,p)			ATOMIC_BITOP(set_bit,nr,p)

#define ATOMIC_BITOP(name,nr,p)			\
    (__builtin_constant_p(nr) ? ____atomic_##name(nr, p) : _##name(nr,p))

extern void _set_bit(int nr, volatile unsigned long * p);

/*
 * These functions are the basis of our bit ops.
 *
 * First, the atomic bitops. These use native endian.
 */
static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
{
    unsigned long flags;
    unsigned long mask = BIT_MASK(bit);

    p += BIT_WORD(bit);

    raw_local_irq_save(flags);
    *p |= mask;
    raw_local_irq_restore(flags);
}

#define BIT_MASK(nr)		(1UL << ((nr) % BITS_PER_LONG))
#define BIT_WORD(nr)		((nr) / BITS_PER_LONG)

#ifdef CONFIG_64BIT
#define BITS_PER_LONG 64
#else
#define BITS_PER_LONG 32
#endif /* CONFIG_64BIT */